Hardware Security Engineer

As a Hardware Security Engineer on Cisco’s HW-CSDL efforts, you will translate hardware security evaluations into implementable design guidance and compliance requirements for product teams.

• Work directly with product hardware teams to review hardware security evaluation results and provide actionable, pragmatic guidance for HW-CSDL compliance
  .
• Deconstruct and assess hardware architectures from the system level down to boards, ASICs/FPGAs, power/management controllers, and discrete components to identify vulnerabilities and design for resilience.
• Interpret and operationalize emerging industry and government standards into technical guidance and design requirements, including NIST SP 800-193
  , CNSA 2.0,
  EU Cyber Resilience Act
  , and IEEE 2883
  .
• Author security guidelines, reference architectures, implementation guides, and best-practice documentation for engineering teams across Cisco.
• Participate in, lead, and balance multiple parallel engagements, consulting efforts, and security initiatives across diverse product families.
• Educate and influence hardware design communities beyond STO to build a security-first approach across the product development lifecycle.

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related technical field with 7+ years of relevant hardware design/engineering experience, or Master’s degree with 4+ years of experience.
• Background in hardware development, including reading/interpreting system-level schematics and block diagrams, component datasheets, PCB design/review, or register-level hardware documentation.
• Background in hardware security fundamentals such as Hardware Root of Trust (RoT),
  Secure Boot
  , hardware and firmware resiliency, cryptographic primitives (symmetric/asymmetric encryption, hashing, digital signatures), and secure key storage.

• Standards and frameworks:
  NIST SP 800-193
  , CNSA 2.0,
  EU Cyber Resilience Act
  , IEEE 2883
• Security building blocks:
  Hardware Root of Trust (RoT),
  Secure Boot
  , TCG DICE / TPM
  , OCP Secure Boot
• Security analysis methods:
  fault injection
  , side-channel analysis
  , JTAG/debug security
• Automation and scripting:
  Python
  , Bash
• Hardware languages:
  Verilog
  , System Verilog
• Compliance and review support:
  LLM-assisted compliance checks
  , automated review scripts
  , security analysis tooling
• AI-assisted development support: LLM-assisted compliance checks for hardware security applications

• Research Triangle Park, NC (hybrid)

• $132,800 - $259,100 per year

• Health insurance (medical, dental and vision)
• 401(k) plan with a Cisco matching contribution
• Paid parental leave
• Short and long-term disability coverage
• Basic life insurance
• Restricted stock units (RSUs) eligibility (vesting following continued employment with Cisco for defined periods of time)
• 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees
• 1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco
• Non-exempt employees receive 16 days of paid vacation time per full calendar year (accrued at rate of 4.92 hours per pay period for full-time employees)
• Exempt employees participate in Cisco’s flexible vacation time off program (no defined limit on how much vacation time eligible employees may use)
• 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward
• Optional 10 paid days per full calendar year to volunteer
• Annual bonuses for non-sales roles (subject to Cisco’s policies)
• Performance-based incentive pay on top of base salary for employees on sales plans (subject to Cisco’s policies)

• The Security& Trust…