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Senior Analog Layout Engineer: Low-Noise ICs

Job in Cupertino, Santa Clara County, California, 95014, USA
Listing for: Programmers.io
Full Time position
Listed on 2025-12-21
Job specializations:
  • Engineering
    Systems Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 125000 - 150000 USD Yearly USD 125000.00 150000.00 YEAR
Job Description & How to Apply Below
Position: Senior Analog Layout Engineer: Low-Noise, High-Performance ICs
A leading technology solutions firm in Cupertino is seeking an experienced Analog Layout Engineer to collaborate with circuit designers and layout leads. In this role, you will leverage your knowledge of analog and mixed-signal IP to deliver high-quality layouts. You must be proficient with advanced CAD tools like CADENCE Virtuoso and MENTOR GRAPHICS and capable of addressing IR drop and RC delay issues.

The ideal candidate will have strong analytical skills and experience in design verification tools.
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Position Requirements
10+ Years work experience
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