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Senior ASIC Front‑End RTL Engineer – Pixel IP; SoC
Job in
Cupertino, Santa Clara County, California, 95014, USA
Listed on 2026-01-06
Listing for:
Apple Inc.
Full Time
position Listed on 2026-01-06
Job specializations:
-
Engineering
Systems Engineer -
IT/Tech
Systems Engineer
Job Description & How to Apply Below
A leading technology company in Cupertino seeks an experienced ASIC Design Engineer for its Pixel IP design team. The role entails designing and manufacturing high-performance processing engines responsible for handling digital images and videos. Candidates should possess a Bachelors Degree in EE/CE, extensive experience in digital hardware design, and familiarity with low-power techniques. Competitive compensation includes base salary ranging from $181,100 to $318,400, along with benefits like medical coverage and stock options.
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Position Requirements
10+ Years
work experience
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