Silicon Validation SW Engineer - CPU & Memory Hierarchy
Listed on 2026-10-07
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Engineering
Test Engineer, Validation Engineer
Apple Inc. Cupertino, CA is seeking a Silicon Validation Software Engineer to validate CPUs, caches, and memory hierarchies on post-silicon platforms.
You will write functional validation software for a system validation tool used across Apple's silicon engineering teams. You will develop targeted stress tests, analyze silicon data, and work with SoC design and product teams to root out bugs across voltage, frequency, and temperature.
Our group is growing, and we are hiring a Silicon Validation SW Engineer - CPU & Memory Hierarchy in Cupertino, CA, United States.
Please review the full job details above before applying.
If your experience matches this role, we encourage you to apply.
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The position is based in Cupertino, CA, United States.
This opportunity is part of our work in IT & Technology, Engineering.
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