SoC Power Optimization Engineer — Automation & ML

Apple Inc. is seeking an SoC Power Analysis and Optimization Engineer in Cupertino, CA. The role focuses on driving SOC power simulation, optimization and modeling, collaborating with architecture, RTL and physical design teams to set power targets and improve efficiency across IPs.

You will work on automating power analysis, leveraging GenAI/LLM approaches, and contributing to the SOC design flow. Strong communication and a background in ASIC power is valued.

We are currently recruiting a SoC Power Optimization Engineer — Automation & ML for our team in Cupertino, CA, United States.

Step into the SoC Power Optimization Engineer — Automation & ML role at Apple Inc. in Cupertino, CA, United States and grow with us.

Please review the full job details above before applying.

If your experience matches this role, we encourage you to apply.