Sr Cloud Hardware Dev Engineer, AWS Generative AI & ML Servers

AWS operates the world's largest fleet of GPU-accelerated servers powering AI/ML training and inference at cloud scale. Our team defines the server architectures, drives the hardware designs, and owns the fleet quality for these platforms — from component selection through datacenter operations. If you want to shape the physical hardware that frontier models train on, this is the role.

We are seeking a Cloud Hardware Development Engineer to define server architectures based on workload demand, translate them into detailed component specifications, and drive validation from PCBA bring-up through rack integration. You will lead ODM design partners through development and production, triage hardware issues across manufacturing and datacenters, and own fleet quality metrics post-launch.

What You Will Do You will define the hardware that runs the world's largest AI training workloads. Your designs span thermal, mechanical, power, and signal integrity across GPU-accelerated platforms. You will drive validation from first silicon through fleet-scale deployment, triage failures correlating across PCIe, power delivery, memory, and accelerator interconnects, and feed root cause findings back into design improvements. When a new server platform launches at a large scale, the architecture, component choices, and quality gates are yours.

Key job responsibilities

Architecture & Design
* Define server architectures based on workload demand and customer requirements, translating them into detailed designs and component specifications that enable high-performance AI training and inference at scale
* Work with interdisciplinary teams of component, firmware, test, qualification, and integration engineers to deliver cohesive designs
* Drive design reviews with ODM/JDM partners covering schematic, layout, BOM, and manufacturing DFx (Design for Test, Design for Manufacturing)
Validation & Bring-up
* Define and execute validation strategies from PCBA bring-up through server and rack integration — covering power sequencing, signal integrity, thermal characterization, and accelerator interconnect performance
* Own hardware debug during EVT/DVT/PVT builds, correlating failures across PCIe, power rails, memory channels, and GPU subsystems
* Triage hardware issues at both ODM facilities and datacenters, conduct root cause analysis, and implement corrective actions

Fleet Quality & Continuous Improvement
* Own fleet quality metrics post-launch: server-level annualized failure rates and component-level failure modes
* Monitor operational telemetry to identify systemic issues and drive design or process changes for current and future platforms
* Partner with test and automation teams to improve manufacturing yield and reduce test dwell times

Cross-Team Collaboration
* Work with EC2 architecture teams to align on instance definitions, workload requirements, and platform trade-offs
* Drive ODM/JDM design partners through development milestones and production ramp
* Collaborate with firmware, software, and operations teams to ensure designs are debuggable, serviceable, and automation-ready

May require occasional (