Junior ASIC Formal Verification Engineer
Listed on 2026-11-04
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Engineering
Test Engineer, Electronics Engineer, Hardware Engineer, Quality Engineering
Annupurna Labs (U.S.) Inc. is seeking a hardware verification engineer to define and check specifications for critical hardware blocks using formal methods. You will join a world-class pre-silicon design team, working with Verilog/SVA and model checkers to prove compliance with the modeled specification.
The role involves understanding hardware requirements, writing functional descriptions, and leveraging scripting to accelerate proof techniques in a fast-paced AWS hardware ecosystem.
We are seeking a motivated Junior ASIC Formal Verification Engineer to join Annapurna Labs in Cupertino, CA, United States.
We would love to welcome a new Junior ASIC Formal Verification Engineer to our team in Cupertino, CA, United States.
For the Junior ASIC Formal Verification Engineer position at Annapurna Labs, we are reviewing applications now.
Step into the Junior ASIC Formal Verification Engineer role at Annapurna Labs in Cupertino, CA, United States and grow with us.
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