RTL Design Engineer — ASIC & PMIC Power
Listed on 2026-11-04
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Engineering
Hardware Engineer, Electronics Engineer, Systems Engineer
Apple Inc. in Cupertino, California, seeks a senior RTL/ASIC designer to deliver complex digital IPs for PMICs. You will design digital logic in System Verilog, collaborate with cross-functional teams, and drive PPA-aware implementation from RTL to gate-level.
The role involves clock domain crossing and reset domain checks, signoff duties, and scripting in Perl/Python, with opportunities for relocation and growth in a leading hardware team.
We have an opening for a RTL Design Engineer — ASIC & PMIC Power in Cupertino, CA, United States within IT & Technology, Engineering.
Learn more about the RTL Design Engineer — ASIC & PMIC Power role in the description above.
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