Senior ASIC Physical Design Engineer Level
Listed on 2026-11-05
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Engineering
Electronics Engineer, Engineering Design & Technologists, Systems Engineer, Hardware Engineer
Annapurna Labs, part of Amazon, seeks an ASIC Physical Design Engineer in Cupertino to drive floor planning, placement, integration, and tapeout for advanced SoCs. You will collaborate with the FE team to translate RTL into robust physical designs, and lead DV/verification using Calibre, IC Validator and PVS across processes.
The role requires 5+ years in physical verification, scripting, and strong communication. Experience with FC/Innovus flows and mentoring is preferred.
We have an opening for a Senior ASIC Physical Design Engineer – Top-Level in Cupertino, CA, United States within Engineering.
We would love to welcome a new Senior ASIC Physical Design Engineer – Top-Level to our team in Cupertino, CA, United States.
For the Senior ASIC Physical Design Engineer – Top-Level position at Amazon Web Services (AWS), we are reviewing applications now.
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