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Senior Analog Mixed Signal Design Engineer; CMOS​/PLL​/Oscillators - s

Job in 2600, Delft, South Holland, Netherlands
Listing for: European Tech Recruit
Full Time position
Listed on 2026-05-18
Job specializations:
  • Engineering
    Systems Engineer, Electronics Engineer, Electrical Engineering, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 80000 - 100000 EUR Yearly EUR 80000.00 100000.00 YEAR
Job Description & How to Apply Below
Position: Senior Analog Mixed Signal Design Engineer (CMOS/PLL/Oscillators) - Visas Supported
Location:

Delft, Netherlands (Visas Supported)

A fantastic opportunity for an experienced Mixed-Signal Design Engineer to join a leading MEMS and Analog Semiconductor company, who offer the industry’s most advanced and most reliable timing solutions. There products have applications ranging from high-performance Networking and Communications Infrastructure to ultra-low power Mobile platforms, including wearable devices.

In this role, you will contribute to building precision timing circuits, leveraging the companies industry-leading MEMS technology.

Responsibilities

Design Analog and Mixed-Signal Circuits meeting architectural requirements and technical specifications

Contribute to the architectural definition of the design and chip integration

Perform calculations, design and verification simulations to ensure building blocks meet specifications at the schematic level and after post-layout extraction, while fully provisioning for DFT and DFM

Work closely with Layout Engineers to validate proper layout, using all best-known methods

Document assigned blocks, and hold preliminary and final design review meetings

Actively participate in the chip bring-up, evaluation and characterization, with emphasis on owned blocks

Work cross-functionally with Product, Characterization, Test, and Application Engineers on issues related to owned circuit blocks

Support other projects as needed by management or as business needs change

Qualifications & Requirements

M.S. in Electrical Engineering or related field with minimum 4 years of related experience, or Ph.D. in Electrical Engineering with minimum 2 years of related experience

Excellent academic record with published research projects prototyped and proven in silicon

Detailed knowledge of CMOS Circuits and noise analysis

Core expertise in one of the following areas:

Integer-N and fractional-N PLL

Temperature sensor

Analog and digital filters

Quartz or MEMS oscillator

Sub-threshold circuits

Low noise regulator and bandgap

High-speed output drivers

Ability to oversee circuit layout for critical blocks

Knowledge of programming languages: MATLAB, VerilogA

Proficient in using Cadence analog design tools

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Position Requirements
10+ Years work experience
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