Field-Programmable Gate Arrays Engineer

We are currently looking for an FPGA Engineer to join the team in Delft.

As an FPGA Engineer, your work will have a meaningful impact by developing next‑generation defence technology within an R&D fast‑paced environment. Closely with the team and other partners, you will bring solutions from the lab to the field deployment.

You will develop mission‑critical, low‑latency hardware solutions for machine vision applications in defence systems, including systems for missile platforms, UAVs, drones, and distributed sensing networks.

Responsibilities

You will  develop, integrate and verify  IP blocks on FPGAs (Nano Xplore and/or Cologne Chip Gate Mate).

Configure and deploy MIPI CSI-2 receiver interfaces  tasked with capturing data streams from diverse sensor types, including low-light and thermal cameras.

Ensure seamless video delivery to display units  by managing the corresponding output routing (such as MIPI DSI).

Take ownership of the FPGA subsystem's integration  into hardware environments characterized by low power consumption and tight space constraints.

Execute the complete verification pipeline,  covering everything from initial simulation and timing closure to final on‑hardware validation.

Work closely with multi‑disciplinary teams —spanning embedded software, hardware, optics, and sensors—to refine overall system requirements.

Requirements

You have  3‑6 years of proven experience  in  FPGA development .

You hold a  degree  in  Computer Engineering  or another relevant domain.

You are proficient in  VHDL  and/or  System Verilog .

You have  hands‑on experience implementing MIPI CSI‑2, I2C and/or SPI interfaces .

You have a solid understanding of  timing constraints and clock domain crossing .

You have experience taking a design  from RTL through validated hardware . You feel comfortable with vendor‑specific and EU sovereign tool chains, including less mature open‑source ecosystems such as YOSYS or NEXTPNR.

Low‑power and resource‑constrained design mindset  suited to wearables.

Ability to  debug complex system‑level issues  independently.

Good communication skills in  English  (Dutch is a plus).

You have the  possibility to obtain NATO and EU security clearances .

Nice‑to‑have:

Experience with  Cologne Chip Gate Mate .

Knowledge of  camera sensors .

Knowledge of  hardware design  and hardware‑software  integration .

Experience or interest in  defence, robotics and AI .

You have experience or affinity for  start‑up  and  R&D environments .

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