Senior Digital ​/ Silicon Validation Engineer

Senior Digital Silicon Validation Engineer -  Delft (Hybrid)
-Semiconductor
About the Role
We are seeking a  Senior Silicon Digital Validation Engineer  with 8+ years of experience to join a pioneering semiconductor scale-up redefining ultra-low-power connectivity for the Internet of Things. In this hands-up, post-silicon validation role, you will bridge the gap between hardware, firmware, and automated lab testing.

Key Responsibilities
Develop and execute comprehensive SoC-level digital validation and bring-up plans from component level through full system operation.
Write mini-firmware (in

C) to directly exercise and troubleshoot hardware interfaces and MCU peripherals.
Build automated test setups and scripts using  Python  to control digital lab equipment and analyze performance data across PVT (Power, Voltage, Temperature) conditions.
Debug complex hardware, firmware, and digital interface issues using oscilloscopes, logic analyzers, and signal generators.
Collaborate closely with design, applications, and software engineering teams to resolve silicon bugs and define future test specs.
Requirements

Experience:

~8-10 years in Digital / Silicon / SoC Validation, Hardware Testing, or FPGA Emulation.

Education:

BSc or MSc in Electrical Engineering, Embedded Systems, or a related field.
Firmware & Code:  Strong proficiency writing low-level code/firmware (C/Embedded

C) to interface with hardware, alongside  Python  for test automation and data analysis.
Hardware & Protocols:  Deep understanding of MCU architectures ( ARM Cortex ), digital interfaces, memory, and protocols ( AHB, APB, SPI, I2C, UART ).
Lab Debugging:  Hands-on experience with oscilloscopes, logic analyzers, DMMs, and signal generators.
Pre/Post-Silicon Background:  Solid experience in post-silicon bring-up or pre-silicon validation/FPGA emulation (e.g., Zynq processors).
Nice to Have
Background in GNSS, GPS, or low-power wireless IoT systems.

Experience with Power, Voltage, and Temperature (PVT) characterization.
Exposure to analog hardware testing.
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