Senior Memory Verification Architect; DDR, SV/UVM
Listed on 2026-10-13
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Engineering
Test Engineer
Renesas Electronics is seeking a Senior Staff Design Verification Engineer to provide technical leadership for verification of memory interface products used in data center, AI, and cloud applications. The role focuses on DDR6 and future generations, with expert use of System Verilog and UVM.
The ideal candidate has 10+ years in semiconductor verification, can drive verification strategies, and mentor engineers.
The Senior Memory Verification Architect (DDR6, SV/UVM) role at Renesas Electronics Corp. is now open for applications in Duluth, GA, United States.
We are currently recruiting a Senior Memory Verification Architect (DDR6, SV/UVM) for our team in Duluth, GA, United States.
This is a strong opening to take on the Senior Memory Verification Architect (DDR6, SV/UVM) role at Renesas Electronics Corp.
As a Senior Memory Verification Architect (DDR6, SV/UVM), you will play an important part at Renesas Electronics Corp. in Duluth, GA, United States.
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