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Principal Design Verification Architect – DDR6 & UVM

Job in Duluth, St. Louis County, Minnesota, 30155, USA
Listing for: Renesas Electronics Corp.
Full Time position
Listed on 2026-10-17
Job specializations:
  • Engineering
    Test Engineer, Electronics Engineer, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 150000 - 210000 USD Yearly USD 150000.00 210000.00 YEAR
Job Description & How to Apply Below

Renesas Electronics Corp. seeks a Principal Design Verification Engineer to provide technical leadership for verification of next-generation semiconductor memory interface products, including data buffer silicon.

The role drives verification strategy and execution for complex digital designs, partnering with RTL and design teams to ensure functionality and performance. The ideal candidate has deep semiconductor verification expertise with System Verilog and UVM, with experience in high-speed

This posting is for the Principal Design Verification Architect – DDR6 & UVM role at Renesas Electronics Corp., based in Duluth, GA, United States.

We are currently recruiting a Principal Design Verification Architect – DDR6 & UVM for our team in Duluth, GA, United States.

This is an excellent opportunity to take on the Principal Design Verification Architect – DDR6 & UVM role at Renesas Electronics Corp.

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