Mask Design Engineer: Advanced Interconnect & Wafer Layout
Listed on 2026-10-06
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Engineering
Electronics Engineer, Electrical Engineering
Micross AIT is seeking a Circuit and Mask Design Engineer to layout and procure lithography masks for post-CMOS wafer processing, including TSV and copper RDL interconnects. You will generate die and wafer layouts, order masks, and review vendor data while learning Micross AIT’s process biases in a microfabrication facility.
You will interact with Program Managers, Engineering, and external customers to ensure design support and satisfaction, with duties spanning mask design, vendor
Join us at Micross Logo as our next Mask Design Engineer:
Advanced Interconnect & Wafer Layout in Durham, NC, United States.
All applications are reviewed carefully by our team.
The position is based in Durham, NC, United States.
This opportunity is part of our work in IT & Technology, Engineering.
The advertised compensation is 90..
We aim to respond to suitable candidates as soon as possible.
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