Hybrid Senior ASIC Design Engineer - Networking Chips
Listed on 2026-10-13
-
Engineering
Electronics Engineer, Hardware Engineer
Hewlett Packard Enterprise (HPE) is seeking a Senior ASIC Design Engineer for our Networking Silicon team in Durham, NC. This hybrid role requires you to be in the office about 2 days per week, working on high‑speed networking chips from specification to netlist.
You’ll design modules, write detailed RTL and SVA test benches in Verilog/System Verilog, mentor junior engineers, and collaborate with physical design for timing closure while meeting power targets.
We invite applications for the Hybrid Senior ASIC Design Engineer
- Networking Chips position located in Durham, NC, United States.
This is a great role to take on the Hybrid Senior ASIC Design Engineer
- Networking Chips role at HITEC.
As a Hybrid Senior ASIC Design Engineer
- Networking Chips, you will play an important part at HITEC in Durham, NC, United States.
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