Hybrid Senior ASIC Design Engineer – Networking Chips
Listed on 2026-10-15
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Engineering
Hardware Engineer, Systems Engineer
Hewlett Packard Enterprise is seeking a highly motivated ASIC Design Engineer to join our Networking Silicon group in Durham, NC. You will architect complex modules for high-performance networking chips, write detailed specifications and implement designs in Verilog/System Verilog, with rigorous verification and collaboration with physical design for timing closure.
The role emphasizes mentoring junior engineers, leading technical efforts, and delivering power-aware, high-density silicon blocks
This posting is for the Hybrid Senior ASIC Design Engineer – Networking Chips role at Hewlett Packard Enterprise, based in Durham, NC, United States.
Consider building your career as a Hybrid Senior ASIC Design Engineer – Networking Chips at Hewlett Packard Enterprise.
The Hybrid Senior ASIC Design Engineer – Networking Chips position in the Engineering field is open for applications.
We have an opening for a Hybrid Senior ASIC Design Engineer – Networking Chips in Durham, NC, United States within Engineering.
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