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Design Verification Engineer

Job in City of Edinburgh, Edinburgh, City of Edinburgh Area, EH1, Scotland, UK
Listing for: Renesas Electronics Corporation
Full Time position
Listed on 2026-05-16
Job specializations:
  • Engineering
    Software Engineer, Systems Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 100000 - 125000 GBP Yearly GBP 100000.00 125000.00 YEAR
Job Description & How to Apply Below
Position: Staff Design Verification Engineer
Location: City of Edinburgh

We are seeking a highly skilled and motivated Staff Design Verification Engineer to join our hardware development team. In this role, you will be responsible for ensuring the functional correctness and robustness of complex digital and mixed‑signal ASIC designs through advanced verification methodologies. You will work closely with architects, designers, and other verification engineers to deliver high‑quality silicon solutions.

Responsibilities
  • Develop and execute comprehensive verification plans for complex mixed‑signal ASIC designs.
  • Create and maintain test benches using System Verilog/UVM.
  • Write and debug test cases to verify functionality, performance, and corner cases.
  • Perform block‑level and full‑chip verification, including simulation, coverage analysis, and regression run/debug.
  • Collaborate with design engineers to understand specifications and identify verification requirements.
  • Analyze and resolve issues found during verification and post‑silicon validation.
  • Mentor junior engineers and contribute to improving verification processes and infrastructure.
  • Participate in code reviews and contribute to continuous improvement of design and verification practices.
  • Manage and debug gate‑level simulation (pre‑ and post‑layout, with and without SDF timing annotation).
Qualifications
  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
  • 10+ years of experience in digital and/or mixed‑signal design verification.
  • Strong proficiency in System Verilog, UVM, and simulation tools (Synopsys VCS, Cadence Xcelium).
  • Solid understanding of digital design fundamentals, RTL design, and ASIC development flows.
  • Experience with scripting languages (Python, Perl, Tcl) for automation.
  • Familiarity with formal verification, assertion‑based verification, and coverage‑driven verification.
  • Excellent problem‑solving skills and attention to detail.
  • Strong communication and teamwork abilities.
  • Experience with version control systems and CI/CD workflows.
  • Experience with other verification methodologies (e/eRM, hardware/software co‑simulation).
  • Knowledge of standard protocols desired (AMBA, I2C, etc.)

Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.

We have adopted a hybrid model that gives employees the ability to work remotely two days a week while ensuring that we come together as a team in the office the rest of the time. The designated in‑office days are Tuesday through Thursday for innovation, collaboration and continuous learning.

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