Senior​/Principal FPGA Engineer

Senior / Principal FPGA Engineer

Locations:
Edinburgh, Luton, Bristol, Southampton (Hybrid, 2 days from home). Compensation: circa £88 per hour + overtime.

Contract:

Contract position.

Interview:
Virtual.

Working hours:

Mon–Fri.

• Design, develop, and verify FPGA designs using VHDL.
• Document and record deliverables.
• Verify FPGA designs.
• Maintain configuration management and keep designs under revision control.
• Provide progress reports.

• At least 5 years’ experience developing FPGA using VHDL or Verilog.
• Experienced with Mentor Graphics FPGA development tools including HDL Designer, Model Sim / Questa and Precision.
• Familiar with Xilinx / Intel (Altera) / Microsemi (Actel) design flows (ISE, Vivado, Quartus) and third‑party synthesis tools.
• Experience specifying timing and area constraints for efficient FPGA place and route.
• Independent verification using VHDL.
• Experience with FPGA requirements capture and requirements management tools.

• Development of real‑time, embedded, safety‑critical FPGA, preferably in accordance with RTCA/DO‑254 D‑AL A or
  
  B.
• Independent verification using System Verilog / UVM.
• Experience of embedded processor cores (e.g., ARM) in FPGA designs.