More jobs:
Sr Principal Design Engineer; Chiplet Solutions
Job in
City of Edinburgh, Edinburgh, City of Edinburgh Area, EH1, Scotland, UK
Listed on 2026-06-03
Listing for:
Cadence Design Systems
Full Time
position Listed on 2026-06-03
Job specializations:
-
Engineering
Systems Engineer, Electronics Engineer
Job Description & How to Apply Below
Location: City of Edinburgh
Overview
Sr Principal Design Engineer – Cadence Silicon Solutions Group (SSG). Based in Edinburgh, United Kingdom, reporting to the Design Engineering Group Director. The Cadence IP & Chiplet solutions enable customers to tackle silicon product development in a system context, focusing on product differentiation and reduced time to volume. Cadence pursues industry leading IP & Chiplet solutions to support fast-moving application spaces such as Physical AI, Data Centre and High Performance Computing.
Job Responsibilities- Provide technical leadership of complex silicon programs consisting of leading-edge IP.
- Collaborate with the Chiplet Architecture team to define next-generation Chiplets.
- Integrate Cadence IP Solutions (e.g., UCIe, PCIe, Ethernet, USB, NPU, Audio, Vision) and partner IP Solutions (e.g., CPUs, ISP, Silicon Monitors, No
Cs). - Lead RTL, Testbench, Formal Analysis and Trial Synthesis activities.
- Ensure Quality Assurance through hierarchical LINT, CDC and release flows.
- Plan activities and milestones for Chiplet Subsystems and System IP development.
- Lead cross-functional technical meetings with domain leads (e.g., Verification, SW Support).
- Participate in customer pre-sales and post-sales meetings and in Technical Review Meetings and ISO-9001 checklist reviews.
- Represent Cadence by presenting at industry conferences such as IEEE, DAC, CDNLive.
- Degree in Electrical/Electronic Engineering, Microelectronics, or related discipline.
- 12+ years’ experience in microelectronics/EDA industry.
- Experience with Verilog RTL Design.
- Experience with Metric Driven Verification (MDV).
- Experience with front-end design tools covering LINT, Synthesis, CDC Analysis.
- Experience with SoC Architecture and Development.
- Experience with technical team leadership.
- Excellent oral and written English.
- Self-motivated with excellent planning, interpersonal and communication skills.
- Experience with AMBA, PCIe, CXL & UCIe protocols preferred.
- Experience with Quality processes such as ISO-9001 & ISO-26262 preferred.
Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization. We strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace.
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