Principal Digital RTL Engineer — SoC & Silicon Impact
Job in
City of Edinburgh, Edinburgh, City of Edinburgh Area, EH1, Scotland, UK
Listed on 2026-08-31
Listing for:
Cadence Design Systems
Full Time
position Listed on 2026-08-31
Job specializations:
-
Engineering
Hardware Engineer, Test Engineer, Electronics Engineer, Systems Engineer
Job Description & How to Apply Below
Cadence Design Systems in Edinburgh, UK, seeks a Principal Digital Design Engineer to drive high-performance RTL development for advanced SoCs within the PSG. You will own RTL from architectural concepts through synthesis and handoff, collaborating with architecture, verification, and physical design teams to solve complex silicon problems.
The role targets senior engineers with expertise in System Verilog, RTL debugging, and timing closure, contributing to cutting-edge semiconductor solutions
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