Senior Digital Verification Architect — Chiplet & VIP Expert
Listed on 2026-10-30
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Engineering
Electronics Engineer, Hardware Engineer, Test Engineer, Systems Engineer
Cadence Design Systems, Inc. in Edinburgh is seeking a Digital Electronics Principal Verification Engineer to join a seasoned chiplet team. You will develop verification environments, UVM-based scoreboards and coverage, and collaborate with architects and design engineers.
The role requires 10+ years in microelectronics/EDA, Verilog RTL, MDV and formal verification, plus strong English and communication skills.
Location:
Edinburgh, on-site with Cadence tools and ISO-9001 collaboration.
We would love to welcome a new Senior Digital Verification Architect — Chiplet & VIP Expert to our team in City of Edinburgh, Scotland, United Kingdom.
We aim to respond to suitable candidates as soon as possible.
Full responsibilities and requirements are described in the listing above.
Learn more about the Senior Digital Verification Architect — Chiplet & VIP Expert role in the description above.
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