Senior ASIC Digital Verification Architect; Security IP

Position: Senior ASIC Digital Verification Architect (Security IP)
Synopsys Eindhoven seeks an experienced verification expert to design and execute verification strategies for security IP subsystems. You will build UVM test benches, apply formal methods, and develop coverage models tied to product requirements.
The role involves automating regression, debugging RTL/testbench, and validating hardware/software integration on FPGA and simulators. You will join the Eindhoven Security IP team, collaborating with HW/SW engineers to protect devices across automotive,

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