ASIC​/FPGA Verification Engineer Associate, Experienced, or Lead - SoCal

Position: ASIC/FPGA Verification Engineer - (Associate, Experienced, or Lead) - SoCal

ASIC/FPGA Verification Engineer - (Associate, Experienced, or Lead) - So Cal

Join to apply for the ASIC/FPGA Verification Engineer - (Associate, Experienced, or Lead) - SoCal role at Boeing.

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Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC/FPGA Verification Engineers (Associate, Experienced, or Lead) to join us as part of our Electronic Products team in either El Segundo or Huntington Beach, CA. From complex digitally beam formed phased arrays for constellation satellite programs to computing and networking equipment for commercial airplanes, the group develops ASICs and FPGAs at the heart of Boeing’s products, leveraging leading-edge technology and world‑class partners to provide some of the most complex SoCs in the world.

Position

Responsibilities

• Design and implement an ASIC/FPGA verification environment utilizing UVM & System Verilog.
• Develop self‑checking and reusable test benches from the ground up, employing Object‑Oriented Programming principles such as inheritance and polymorphism, while utilizing UVM to build drivers, monitors, predictors, and scoreboards.
• Create functional coverage models and conduct code coverage analysis to ensure thorough verification of designs during simulation.
• Set up regression tests and collect coverage metrics to ensure comprehensive verification and track progress over time.
• Assist in FPGA‑based prototyping and validation based on program and system requirements and complexity.
• Collaborate with cross‑functional teams to ensure that verification strategies align with overall project goals and timelines.

Basic Qualifications (Required Skills / Experience)

• A Bachelor of Science degree in Engineering (Electrical, Mechanical or Aeronautical), Computer Science, Data Science, Mathematics, Physics, Chemistry, or equivalent non‑US qualifications.
• Proven experience in ASIC/FPGA verification processes.
• Familiarity with defining the architectural framework for ASIC/FPGA verification using System Verilog/UVM, including the delivery and release of production designs.
• Proficiency in hardware verification languages, particularly System Verilog and System Verilog Assertions.
• Demonstrated experience in implementing test plans effectively.
• Solid understanding of Object‑Oriented Programming principles, such as inheritance and polymorphism.
• Capability to design self‑checking and reusable test benches from the ground up.
• Experience in developing functional coverage models and achieving code coverage closure.
• Capable of collaborating with design and system engineering to establish accurate and verifiable ASIC/FPGA level specifications.
• Familiarity with waveform debug tools.
• Revision control systems: SVN, CVS, Git.
• Proficient in Linux environments.

Preferred Qualifications (Desired Skills / Experience)

• 5+ years of related work experience for Level 3; 10+ years for Lead level.
• Master’s Degree in EE, Computer Engineering/Science, or related field.
• Experience with hardware‑based integration and test of ASIC/FPGA designs.
• Experience with hardware emulators, especially Palladium.
• Experience with high‑speed Serdes interfaces (JESD
  204C, PCIe, Ethernet).
• Proficient in scripting languages:
  Make, Perl, Python, etc.
• Familiarity with space‑based design techniques and radiation mitigation.
• Demonstrated history of 1st pass success with ASIC designs.

Typical Education / Experience Levels

Associate (Level
2):
Bachelor’s degree, 2+ years related work experience.

Experienced (Level
3):
Bachelor’s degree, 5+ years related work experience.

Lead (Level
4):
Bachelor’s degree, 9+ years related work experience.

Relocation

This position offers relocation based on candidate eligibility.

Shift Work Statement

This position is for 1st shift.

Employee Referral

Referral to this job is eligible for bonus.

Total Rewards

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