Senior Engineer

The senior engineer will take on the verification of full Rx and Tx chains of an on-going design. They will help setup and debug simulation test benches, report compliance to spec and validate device register controls for test. The tasks will include:

• Review of block specifications.
• Simulation and reporting compliance to specifications.
• Root cause any specification failures.
• Liaising with the chip lead to integrate the designs.
• Presentation of design for block-level reviews.

5+ years of experience in verification of RF transmitter/receiver (Tx/Rx) systems. Strong experience in simulation-based verification of RF, analog, and communication designs. Hands-on expertise in developing, debugging, and maintaining simulation test benches. Proven ability to analyze, troubleshoot, and resolve verification issues through root cause analysis. Experience in validating design compliance against specifications and preparing verification/compliance reports. Proficient in Verilog and System Verilog.