Senior Reliability Engineer - PDK & EDA Innovation
Listed on 2026-10-06
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Engineering
Systems Engineer, Cybersecurity -
IT/Tech
Systems Engineer, Cybersecurity
Intel in Hillsboro, Oregon, seeks an Experienced Reliability Engineer to drive PDK design rules and collateral for reliability across advanced silicon and packaging technologies.
You will partner with internal teams and EDA vendors to deliver robust PDK/TFM content, perform benchmarking, and develop IP ecosystems that enable industry-leading PDKs, design rules, and quality verification for customer designs on Intel technology.
The Senior Reliability Engineer - PDK & EDA Innovation role at Intel is now open for applications in Folsom, CA, United States.
Full responsibilities and requirements are described in the listing above.
Learn more about the Senior Reliability Engineer - PDK & EDA Innovation role in the description above.
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