Senior AI SoC Cache Architect

Intel Corporation in Santa Clara, CA is seeking a SoC Cache Design Engineer to drive microarchitecture, RTL coding in Verilog/System Verilog, and full validation for AI-focused cache subsystems. You will collaborate across verification, physical design, and silicon bring-up teams to ensure power, performance, and area targets are met.

Qualified candidates will have extensive RTL experience, expertise with AXI/ABH-like buses, scripting for automation, and a track record of leading complex IP

For the Senior AI SoC Cache Architect position at Intel Corporation, we are reviewing applications now.

Are you ready to take on the Senior AI SoC Cache Architect role at Intel Corporation?

We would love to welcome a new Senior AI SoC Cache Architect to our organisation in Folsom, CA, United States.

Step into the Senior AI SoC Cache Architect role at Intel Corporation in Folsom, CA, United States and grow with us.