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College Grad - HBM SoC Design Engineer​/Architect Folsom, California,

Job in Folsom, Sacramento County, California, 95630, USA
Listing for: Micron Technology, Inc.
Full Time position
Listed on 2026-10-15
Job specializations:
  • Engineering
    Electronics Engineer, Systems Engineer, Hardware Engineer, Test Engineer
Salary/Wage Range or Industry Benchmark: 79000 - 175000 USD Yearly USD 79000.00 175000.00 YEAR
Job Description & How to Apply Below
## New College Grad - HBM SoC Design Engineer/Architect Folsom, California, United States of America Apply Now Find out how well you match with this jobJob :
JR113782
** Our vision is to transform how the world uses information to enrich life for
* all*.
** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.### ### At Micron Technology, we transform how the world uses information to enrich life for all. The Heterogeneous Integration Group (HIG) develops next-generation High Bandwidth Memory (HBM) solutions that enable advanced AI, high-performance computing, data center, and networking applications.

Our team collaborates across architecture, RTL design, verification, physical design, firmware, and product engineering to deliver innovative memory-centric SoC solutions that meet demanding power, performance, area, quality, and schedule objectives.### As an HBM SoC Design Engineer/Architect, you will contribute to the design, integration, and validation of advanced HBM logic die and memory-centric SoCs. Working alongside experienced engineers, you will apply knowledge gained through academic coursework, research, internships, and engineering projects to solve real-world semiconductor design challenges.

This role offers opportunities to develop expertise in digital design, ASIC development, HBM architecture, and AI-enabled engineering methodologies that improve design productivity and quality.### ### Responsibilities
* Design, implement, and integrate digital logic and subsystem RTL using Verilog or System Verilog for next-generation HBM SoC solutions.
* Collaborate with architects and multi-functional engineering teams to translate functional requirements into microarchitectures, interface definitions, and implementation plans.
* Support design-quality activities including simulation, synthesis, static timing analysis, clock-domain crossing (CDC) analysis, debugging, and design reviews.
* Evaluate power, performance, area, and timing tradeoffs to develop data-driven technical recommendations and improve design quality.
* Develop automation solutions and leverage AI Assisted workflows, Generative AI, Large Language Models (LLMs), or Agentic AI technologies to improve engineering productivity, verification efficiency, and design analysis.  ###

Minimum Qualifications
* Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field completed prior to the employment start date.
* Academic, research, internship, or project experience in digital design, ASIC development, FPGA design, computer architecture, or a related discipline.
* Working knowledge of Verilog, System Verilog, VHDL, or another hardware description language.
* Understanding of digital design fundamentals including finite-state machines (FSMs), pipelining, clocking, reset strategies, timing concepts, and synchronous logic.
* Strong analytical, problem-solving, written communication, and verbal communication skills with the ability to work effectively in collaborative engineering environments.  ###

Preferred Qualifications
* Master's or Ph.D. degree in Electrical Engineering, Computer Engineering, or a related technical discipline completed prior to the employment start date.
* Coursework, research, internship, or project experience in SoC design, RTL development, design verification, physical design, embedded systems, or semiconductor technologies.
* Familiarity with synthesis, static timing analysis (STA), simulation, formal verification, UVM, FPGA prototyping, or industry-standard EDA tools.
* Understanding of memory systems and high-speed interfaces such as HBM, DDR, LPDDR, PCIe, or CXL.
* Experience with automation, AI Enabled development tools, Generative AI, Large Language Models (LLMs), AI Assistants, or Agentic AI solutions applied to semiconductor design, validation, or engineering workflows.

The US base salary range that Micron Technology estimates it could pay for this full-time position is:$79,000.00 - $ a year Additional compensation may include benefits, bonuses and equity.  Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target base pay for new hire salaries of the position across all US locations.

Within the range, individual pay is determined by work location and additional job-related…
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