HBM SoC Physical Design Engineer — MMMC Timing & Tapeouts
Listed on 2026-11-04
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Engineering
Hardware Engineer, Electronics Engineer, Systems Engineer, Electrical Engineering
Micron Technology, Inc. in Folsom, CA seeks a SoC Physical Design Engineer to drive implementation from netlist to GDSII, ensuring top‑level integration and PPA targets. You will work with RTL, verification, DFT, IP, packaging, and manufacturing teams to enable robust signoff and successful tape-out.
The role emphasizes ownership of blocks, MMMC timing, and power integrity with opportunities to optimize flows using scripting and AI-enabled workflows.
This posting is for the HBM SoC Physical Design Engineer — MMMC Timing & Tapeouts role at Micron Technology, Inc., based in Folsom, CA, United States.
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We are looking to fill the HBM SoC Physical Design Engineer — MMMC Timing & Tapeouts position at Micron Technology, Inc. in Folsom, CA, United States.
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