ASIC Physical Design Engineer – 3nm SoC, Equity Eligible
Listed on 2026-10-17
-
Engineering
Electronics Engineer, Test Engineer, Hardware Engineer
Broadcom Inc. in Fort Collins, CO is seeking a Design Engineer focused on the physical implementation of high‑performance ASICs. Work across the RTL to GDSII flow, with exposure to 3 nm processes and sub‑micron design methodologies in a collaborative, fast-paced R&D setting.
You will use Cadence Innovus, Synopsys ICC2, and Prime Time, partnering with multiple disciplines to deliver silicon solutions for AI, networking, and storage products.
This is a genuine position to take on the ASIC Physical Design Engineer – 3nm SoC, Equity Eligible role at Broadcom Inc.
The position is based in Fort Collins, CO, United States.
This opportunity is part of our work in Engineering.
The advertised compensation is 120..
We aim to respond to suitable candidates as soon as possible.
Full responsibilities and requirements are described in the listing above.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).