Hybrid VLSI ASIC Logic Design Engineer

Hewlett Packard Enterprise is seeking a VLSI ASIC Logic Design Engineer in Colorado for a hybrid role requiring in-office presence two days per week. You will design and verify VLSI components and hardware systems, determine architectures, and extend verification with System Verilog, SVAs, and formal methods.

You will collaborate with cross-functional teams to deliver reliable, cost-effective designs and mentor junior staff while advancing your expertise in RTL design, verification, and EDA tools.

We are looking to fill the Hybrid VLSI ASIC Logic Design Engineer position at Hewlett Packard Enterprise in Fort Collins, CO, United States.

We invite applications for the Hybrid VLSI ASIC Logic Design Engineer position located in Fort Collins, CO, United States.

The following role is for a Hybrid VLSI ASIC Logic Design Engineer with Hewlett Packard Enterprise.