Principal FPGA​/ASIC Verification Engineer; Onsite- Active Secret

Position: Principal FPGA/ASIC Verification Engineer (Onsite)- Active Secret
Job d:
Posted Yesterday

Start Date:

Location:

US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150ACountry:
United States of America Time Type:
Full time

Date Posted:

Country:

United States of America

Location:

US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150A

Position Role Type:

Onsite

U.S. Citizen, U.S. Person, or Immigration Status Requirements:

Active and transferable U.S. government issued security clearance is required prior to start date.​ U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance​

Security Clearance Type:
Secret - Current

Security Clearance Status:
Active and existing security clearance required on day 1

At RTX, the world's largest aerospace and defense company, 185,000 great minds are united by purpose and inspired to make a difference solving the world’s most complex problems. With our three market leading businesses, world-class operations and investments in research and development, we offer capabilities and opportunity no one else can. Together, we push the boundaries of known science and find new ways to connect and protect our world.

Collins Aerospace is a leader in technologically advanced, intelligent solutions that help redefine the aerospace and defense industry. With a comprehensive portfolio and deep technical expertise, we help customers meet the demands of the global market. Join us and help shape the future of aerospace and defense.

We are seeking an experienced and highly motivated Principal Electrical or Computer Engineer to lead the design, implementation, and verification of advanced test benches for a portfolio of high-performance digital ASICs and FPGAs. In this role, you will drive the development of cutting-edge signal processing and information assurance technologies supporting critical Mission Systems programs as part of the Microelectronics Technology team.

This candidate will be onsite based out of Fort Wayne, IN.

What You Will Do Verification environment architecture and design using System Verilog with OVM/UVM Creation of written test plan, testcases, code coverage tracking, and functional coverage tracking Testbench development for the verification of RTL blocks using VHDL or System Verilog Recommend new tools and practices for continuous improvement in the group's ASIC / FPGA verification flow Contribute to engineering estimates for new program pursuits.

Provide technical leadership for project verification teams by breaking down work, planning activities, and reporting status Qualifications You Must Have Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and minimum 8 years prior relevant experience oran Advanced Degree in a related field and minimum 5 years of experience

Active and transferable U.S. government issued security clearance is required prior to start date U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance Demonstrated experience developing and simulating RTL designs using VHDL and/or Verilog in a professional FPGA or ASIC development environment.

At least 4+ years experience developing and simulating RTL designs using VHDL and/or Verilog in a professional FPGA or ASIC development environment.

Demonstrated ability to work independently and lead and/or mentor junior engineers within a team environment

Proven ability to design, implement, and execute verification test benches for RTL blocks using VHDL and/or System Verilog.
4+ years of experience applying chip-level verification methodologies, including constrained-random testing, functional coverage analysis, and assertion-based verification (System Verilog) Experience using revision control systems such as Git or Subversion to manage source code, collaborate across engineering…