Senior SI/PI Packaging Lead .5D ASICs
Listed on 2026-10-27
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Engineering
Packaging Engineer, Systems Engineer, Hardware Engineer
Cisco Silicon One is seeking a Signal and Power Integrity Technical Lead to advance next-generation ASIC packaging and high-speed signaling. You will define rules, perform SI/PI analyses, and collaborate with cross-functional teams to ensure power, performance, and area goals are met.
The role requires extensive experience in SI/PI, layout validation, and high-speed memory interfaces, with mentoring responsibilities for junior engineers and a drive for design excellence at scale.
This role, Senior SI/PI Packaging Lead for 2.5D ASICs at Cisco Systems, Inc, could be your next move.
This Full Time role is for the Senior SI/PI Packaging Lead for 2.5D ASICs role at Cisco Systems, Inc.
We are seeking a motivated Senior SI/PI Packaging Lead for 2.5D ASICs to join Cisco Systems, Inc in San Jose, CA, United States.
Consider building your career as a Senior SI/PI Packaging Lead for 2.5D ASICs at Cisco Systems, Inc.
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