Senior ASIC Engineer - DFT Focus

Position: NVIDIA Senior ASIC Engineer - DFT Focus
Join NVIDIA as a Senior ASIC Design Engineer specializing in DFT methodologies. Shape innovative SoC designs and mentor upcoming talent in the field.

In this key role on the DFX Methodology Team, you will influence the design and verification of DFT IPs, contributing to the entire silicon lifecycle. By facilitating collaboration and driving innovation, you will ensure high standards and adaptability in the design process.

Key Responsibilities:

• Lead DFT IP architecture and design initiatives

• Enhance DFT methodologies to meet future demands

• Coordinate feature sets with architecture and software teams

• Collaborate for smooth integration across teams

• Develop and verify comprehensive test plans

Requirements:

• Bachelor’s degree or equivalent with 8+ years, or Master’s with 6+ years

• 5+ years in SoC architecture, RTL design, and verification

• Expertise in micro-architecture and RTL with Verilog

• Familiar with post-silicon validation and ATE

• Excellent communication and collaborative skills

Bring your DFT knowledge to NVIDIA and contribute to impactful semiconductor innovations.
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