Distinguished PQC Cryptography & Architecture Leader

(IDQ), part of IonQ, is a global leader in quantum-safe communications. We provide solutions to protect governments, telecommunication infrastructures, and banking & financial institutions from the “harvest-now, decrypt-later” threat, delivering both terrestrial and space-based quantum-safe networks in live operation globally.

We are looking for a Distinguished Leader to provide the overall technical leadership for our post-quantum cryptography (PQC) hardware acceleration programme, part of our quantum-safe product portfolio targeting hardware security module (HSM) and network-appliance applications.

As the most senior technical authority of the programme, you will own the end-to-end architecture, from cryptographic algorithm and standards strategy to an FPGA-based product architecture with a clear path to ASIC, and you will set the technical direction across the cryptography, hardware, software and security disciplines involved. This is a rare opportunity to shape a strategic security product line at one of the few companies where quantum-safe security is the core business.

You will define the system architecture and microarchitecture of a multi-algorithm PQC accelerator implementing ML-KEM, ML-DSA and SLH-DSA/LMS: hardware/firmware partitioning, throughput and lane sizing derived from real customer traffic models, and a stable core-interface specification that lets cryptographic cores evolve behind a frozen contract. You will own the algorithm and standards strategy (NIST FIPS 203/204/205, CNSA 2.0, FIPS 140-3), drive make/buy and IP-licensing decisions and shape the security and certification architecture together with our side-channel and compliance specialists.

You will set the technical roadmap, arbitrate the hardest cross-domain design decisions, mentor the senior engineers who own each domain, and represent the programme externally with customers, standards bodies, certification laboratories and executive stakeholders.

• Own the end-to-end architecture and technical roadmap of a PQC hardware-acceleration product line (algorithms, microarchitecture, interfaces, and security/certification strategy) from concept to shipping product
• Act as the programme’s most senior technical authority: set direction across disciplines, mentor senior engineers, and represent the technology with customers, standards bodies and executives

We are looking for a candidate with a Master’s or PhD in Electrical Engineering, Computer Science, Cryptography or a related field and fifteen or more years of experience architecting complex digital security hardware, including deep, hands‑on exposure to cryptographic implementation with genuine post‑quantum depth. You are a recognised authority in your field, evidenced by shipped market‑defining security products, contributions to standards, publications or patents, and you have taken accelerators, secure elements or HSM‑class systems from specification to production more than once.

You are equally credible discussing lattice‑based cryptography with a cryptographer, timing closure with an FPGA designer, and certification strategy with a FIPS laboratory, and you can defend an architecture in front of a demanding customer or executive committee. Fluency in English is required;
French or German is an advantage.

• Recognised architect of cryptographic or security hardware products, with authoritative depth in PQC algorithms and standards (FIPS 203/204/205, CNSA 2.0, FIPS 140-3)
• Distinguished‑level technical leadership: sets direction across domains, mentors' senior specialists, and represents the company externally

You thrive on ambiguity and ownership, turning a strategic mandate into an…