Senior MOCVD Development Engineer

The Senior Staff MOCVD Development Engineer will lead process and hardware development for GaN-based epitaxial growth on silicon and sapphire substrates, enabling next-generation power devices. This role emphasizes deep technical understanding of MOCVD reactor behavior, GaN heterostructure engineering, and epitaxial integration for p-GaN and e-mode device architectures. The ideal candidate combines strong experimental rigor, demonstrated materials expertise, and cross-functional leadership to translate research concepts into production-capable processes.

• Develop, optimize, and transfer MOCVD epitaxial processes for GaN-on-Si and GaN-on-Sapphire wafers, focusing on high-performance device layers targeting e-mode (p-GaN gate) and HEMT applications.
• Design and execute development roadmaps for buffer structure engineering, strain management, and defect reduction to achieve target breakdown voltages, leakage, and mobility metrics.
• Lead process integration studies addressing p-type activation, Mg incorporation, compensation control, and interface optimization for gate reliability.
• Drive reactor-scale modeling and hardware tuning to improve growth uniformity, thickness control, and wafer bow mitigation on large-diameter substrates.
• Analyze defect physics mechanisms (threading dislocations, V-defects, point defects) affecting device reliability and performance, driving iterative improvements in process conditions.
• Design and execute structured experiments (DOE-based) to deconvolve multi-parameter interactions in reactor conditions, precursor chemistry, and thermal profiles.
• Characterize epitaxial films using XRD, AFM, TEM, PL, CV, and Hall measurements, correlating data to growth parameters and device performance.
• Collaborate closely with device engineers and reliability teams to co-optimize epitaxial structures for threshold voltage, dynamic R_on, off-state leakage, and long-term stability.
• Translate device performance specifications and reliability requirements into detailed epitaxial process and material specifications; document Process of Record (PoR) and engineering specifications for qualification and manufacturing handoff.
• Support failure analysis, root cause investigations, and corrective action implementation for process-related device excursions or reliability issues.
• Lead process transfer activities from R&D to pilot or production-scale reactors, ensuring knowledge capture and robust parameter windows.

• Education: Ph.D. in Materials Science, Electrical Engineering, Physics, or closely related discipline. M.S. with 10+ years of directly relevant hands‑on experience.
• Minimum 8+ years of direct hands‑on MOCVD process development and optimization for III‑V or III‑nitride semiconductor materials (GaN, AlGaN, InGaN, etc.).
• Demonstrated technical expertise in GaN-on-Si and/or GaN-on-Sapphire heterostructures, including buffer layer design, strain engineering, and defect reduction strategies.
• Strong experience developing p-type GaN epitaxy and e-mode device architectures, with deep understanding of Mg activation, dopant diffusion control, and gate stack engineering for threshold voltage stability.
• Proficiency with advanced epitaxial layer characterization techniques (XRD, SIMS, CL, TEM, PL, Hall effect measurements) and ability to interpret results to guide process optimization.
• Track record of designing complex DOEs, executing structured experiments, conducting statistical analysis (SPC, multivariate data interpretation), and drawing evidence‑based conclusions. Demonstrated success in transferring epitaxial processes from R&D to pilot or high-volume manufacturing environments, with understanding of manufacturability constraints and yield optimization.
• Excellent written and verbal communication skills.
• Experience with multiple MOCVD platforms (e.g., Aixtron G5, G4, or Veeco Propel systems) – preferred.
• Familiarity with GaN power device design requirements and performance metrics – preferred.
• Prior leadership or mentoring experience in an R&D or manufacturing engineering environment – preferred.

The expected annual pay range for this position is $180K–$220K. This…