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Sr. ASIC Layout Design Engineer

Job in Goleta, Santa Barbara County, California, 93116, USA
Listing for: Anysilicon
Full Time position
Listed on 2026-10-18
Job specializations:
  • Engineering
    Electronics Engineer, Electrical Engineering, Systems Engineer, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 120000 - 180000 USD Yearly USD 120000.00 180000.00 YEAR
Job Description & How to Apply Below

Teledyne Technologies Inc., Goleta, CA 93117

Job Description

Teledyne Technologies is seeking a Senior Analog/Mixed-Signal Layout Design Engineer to develop high-performance focal-plane array readout integrated circuits (ROICs) for various applications, including infrared detectors and cameras. This role involves collaboration with circuit designers and requires expertise in analog and mixed-signal layout design.

Responsibilities
  • Develop high-quality analog/mixed-signal IC layouts and create GDS databases using Cadence and Siemens software tools.
  • Collaborate with circuit designers to optimize floor-planning, placement, and routing.
  • Ensure layout integrity and compliance with foundry wafer fabrication through DRC, LVS, PEX, and PDK.
  • Interface with ROIC designers, detector engineers, systems engineers, processors, test, and packaging teams to optimize performance and manufacturability.
  • Present weekly updates on project schedules and prepare reports for design reviews and customer presentations.
  • Handle Export Controlled Information and follow GTC protocol and jurisdictional classification.
  • Release and maintain design documents per ISO quality system requirements.
Qualifications
  • Bachelor’s degree in engineering or related field.
  • 10+ years of industry experience in analog/mixed-signal layout design for CMOS circuits.
Skills
  • Expertise in analog/mixed-signal layout design, ideally in 180nm, 130nm, or 75nm process nodes.
  • Strong understanding of Calibre verification (DRC, LVS) and troubleshooting techniques.
  • Experience with custom cell-based layout and top-level floor planning.
  • Technical knowledge of wire resistance, coupling capacitance, and minimizing parasitic effects.
  • Excellent communication skills and ability to work in a multidisciplinary team.
  • Programming/scripting skills in SKILL, TCL, Shell, or Python.
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