Electromagnetic Engineer, Superconducting Qubit Modeling, Quantum AI

Share Electromagnetic Engineer, Superconducting Qubit Package Modeling, Quantum AI

Google place Goleta, CA, USA

• PhD in Computer Science, a related field, or equivalent practical experience.
• 2 years of experience leading a research agenda.
• One or more scientific publication submission(s) for conferences, journals, or public repositories (such as CVPR, ICCV, NeurIPS, ICML, ICLR, etc.).

• 2 years of coding experience.
• 1 year of experience leading research efforts and influencing other researchers.

As an electromagnetic engineer focusing on quantum chip packaging, you will be responsible for the EM modeling and validation of next-generation packages and interconnects to optimize their designs. You will use cryogenic microwave measurements and mechanical design inputs to construct high-fidelity 3D electromagnetic models for microwave packages, interconnects, and signal delivery lines. You will operate at the intersection of mechanical and electromagnetic engineering, ensuring that high-speed signals maintain integrity through complex package transitions to the qubit chip.

The full potential of quantum computing will be unlocked with a large-scale computer capable of complex, error-corrected computations. Google Quantum AI's mission is to build this computer and unlock solutions to classically intractable problems. Our roadmap is focused on advancing the capabilities of quantum computing and enabling meaningful applications.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

US: $174000 - $252000 (USD) + 15% bonus target + equity + benefits

Learn more about benefits at Google.

• Develop high-fidelity 3D electromagnetic models of device packages, transitions, and microwave cavities using Ansys HFSS or CST Studio Suite.
• Conduct high-frequency measurements using VNAs and TDRs to characterize physical prototypes, in cryogenic set ups.
• Manage efforts to "close the loop" by correlating empirical lab data with virtual 3D EM models to refine simulation models.
• Interface with chip designers and packaging teams to provide actionable design guidelines.
• Perform analyses on package geometries to mitigate discontinuities, return loss, and crosstalk.

Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law.

See also Google's EEO Policy , Know your rights: workplace discrimination is illegal , Belonging at Google , and How we hire.

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

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