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PhD position in Neuromorphic Computing, FPGA Design, and Hardware Acceleration

Job in 9700, Groningen, Groningen, Netherlands
Listing for: HiPEAC
Full Time position
Listed on 2026-10-15
Job specializations:
  • IT/Tech
    Hardware Engineer, Computer Science, Systems Engineer
Salary/Wage Range or Industry Benchmark: 34000 - 42000 EUR Yearly EUR 34000.00 42000.00 YEAR
Job Description & How to Apply Below

Are you excited about designing the next generation of energy-efficient AI hardware? Do you want to contribute to cutting-edge research at the intersection of neuromorphic computing, computer architecture, and hardware acceleration?

The University of Groningen is seeking a highly motivated PhD candidate to join the international Qu Ne Co  project, a collaborative research initiative between leading universities in the Netherlands and Japan. As part of an interdisciplinary team, you will develop novel neuromorphic computing architectures inspired by the human brain to enable future heterogeneous computing systems with unprecedented energy efficiency and performance.

This PhD position offers the opportunity to collaborate with internationally renowned researchers, publish in leading conferences and journals, and gain experience in architecture design, hardware implementation, FPGA prototyping, and AI applications.

What are you going to do?

As a PhD candidate, you will contribute to the design and development of next-generation neuromorphic computing systems through algorithm–hardware co-design and computing-in-memory technologies. Your research will span the complete hardware design flow, from architectural exploration to hardware prototyping and experimental evaluation.

  • Designing novel neuromorphic computing architectures based on application requirements and heterogeneous computing use cases.*
  • Investigating emerging memory technologies, including SRAM, RRAM, MRAM, and FeRAM, for efficient neuromorphic hardware implementations.
  • Developing RTL implementations of neuromorphic architectures using hardware description languages and validating their functionality through simulation.
  • Evaluating performance, energy efficiency, and scalability using industry-standard electronic design automation (EDA) tools.
  • Developing representative AI and neuromorphic applications to demonstrate the proposed architectures.
  • Prototyping hardware accelerators on FPGA platforms and integrating them into heterogeneous computing systems.
  • Performing comprehensive experimental evaluations and publishing research findings in leading international conferences and journals.
  • Collaborating closely with project partners in the Netherlands and Japan and participating in international project meetings, workshops, and research visits.
  • Contributing to teaching activities and supervising Bachelor’s and Master’s students where appropriate.
Who are you?

We are looking for an enthusiastic researcher who enjoys solving challenging problems and working in an international research environment.

You should have:
  • A Master’s degree in Computer Engineering, Electrical Engineering, Computer Science, Embedded Systems, or a closely related field.
  • A strong background in computer architecture and digital hardware design.
  • Experience with hardware description languages such as Verilog, System Verilog, or VHDL.
  • Familiarity with FPGA development or RTL design methodologies.
  • Knowledge of computer architecture, hardware accelerators, AI hardware, or neuromorphic computing.
  • Programming experience in Python and/or C/C++.
  • Experience with EDA tools (e.g., Cadence, Synopsys, Vivado) is considered an advantage.
  • Interest in emerging memory technologies and computing-in-memory architectures is desirable.
  • Excellent English communication skills, both written and spoken.
  • Strong analytical abilities, creativity, and the motivation to conduct independent research while collaborating within an international team.

The HiPEAC project has received funding from the European Union's Horizon Europe research and innovation funding programme under grant agreement number . Views and opinions expressed are however those of the author(s) only and do not necessarily reflect those of the European Union. Neither the European Union nor the granting authority can be held responsible for them.

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