Principal FPGA Engineer Communications Test

Lead FPGA architecture efforts as a Principal Engineer at a global telecommunications solutions provider. Utilize Verilog and VHDL to drive multi-Gbps design successes in this key role.

This position seeks an experienced Principal FPGA Engineer dedicated to enhancing communications test and measurement products. You will define end-to-end FPGA architecture, making critical design decisions while mentoring junior engineers. Responsibilities also include leading complex debug efforts and ensuring timing closure for high-speed designs.

Key Responsibilities:

• Own FPGA architecture for communications products

• Drive end-to-end design using Verilog/System Verilog/VHDL

• Mentor FPGA engineers and resolve technical challenges

• Manage timing closure for multi-Gbps Ser Des FPGA designs

• Collaborate on root-cause debug of silicon issues

Requirements:

• 12-15 years in Electrical/Computer Engineering

• 5+ years in high-speed FPGA design architecture

• Expertise with Ethernet/IP protocol stacks

• Hands-on experience with AMD/Altera FPGA devices

• Strong communication skills for global teamwork

Drive advancing technologies in communications test with proven FPGA design, architecture experience, and mentoring expertise.
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