Senior ASIC Front-end RTL Design Engineer – Research
USC Information Sciences Institute (ISI) in Arlington, VA, seeks a Senior ASIC Research Engineer – Front-end Digital Design to design and verify RTL models of CPUs, memories, and accelerators for national importance projects. You will work with a cutting-edge team and may collaborate with MOSIS 2.0, integrate third-party IP cores, and engage with DARPA/IARPA and CHIPS Act sponsors.
The role is based in ISI's Arlington, VA office, offering a collaborative university setting with learning and
We have an opening for a Senior ASIC Front-end RTL Design Engineer – Research in VA, United States within IT & Technology, Engineering.
This opportunity is part of our work in IT & Technology, Engineering.
The advertised compensation is 140..
We aim to respond to suitable candidates as soon as possible.
Full responsibilities and requirements are described in the listing above.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).