Specialist, Electrical Engineer; ASIC​/FPGA Design Engineer

Job Title:

Specialist ASIC/FPGA Design Engineer

Job Code: 30424

Job Location:

Herndon, VA (on-site)

Schedule:

9/80 Regular

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Harris is dedicated to recruiting and developing high‑performing talent who are passionate about what they do. Our employees are unified in a shared dedication to our customers’ mission and quest for professional growth. L3

Harris provides an inclusive, engaging environment designed to empower employees and promote work‑life success. Fundamental to our culture is an unwavering focus on values, dedication to our communities, and commitment to excellence in everything we do.

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Harris Technologies is the Trusted Disruptor in the defense industry. With customers’ mission‑critical needs always in mind, our employees deliver end‑to‑end technology solutions connecting the space, air, land, sea and cyber domains in the interest of national security.

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Harris Technologies is an agile global aerospace and defense technology innovator, delivering end‑to‑end solutions that meet customers’ mission‑critical needs. The company provides advanced defense and commercial technologies across space, air, land, sea and cyber domains. L3

Harris has approximately $18 billion in annual revenue and 47,000 employees, with customers in more than 100 countries.

Reporting to the Manager, Engineering (ASIC/FPGA), the Design Engineer will be part of the key ASIC/FPGA design team, responsible for the delivery of FPGA/ASICs for high‑speed crypto applications. S/he will architect, implement high speed crypto architectures, on ASICs/Xilinx Zynq/MPSOC class FPGAs, with hands on design/debug with Ethernet, TCP/IP protocols.

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Harris has state‑of‑the‑art EDA flows/methodologies including Synopsys DC/Primetime/Synplify, Xilinx/Intel/Microchip EDA with HLS, Mentor EDA Family suite:
Questa, VIPs, UVM framework, Clock Domain Crossing (CDC), Reset Domain Crossing (RDC), Questa Lint, and Catapult (HLS).

This is a key, high impact role in the organization to ensure robust quality and delivery of communication products for National Security.

• Derive engineering specifications from system requirements and develop detailed architecture.
• Execute design (RTL AND/OR HLS (C++ to RTL)) and RTL quality (RDC, CDC, Formal, Lint).
• Generate test plans.
• Perform module level verification, synthesis/STA, Lab debug, SW driven validation on Linux based SOC evaluation boards.
• Silicon/FPGA bring up, characterization and production amp/support/collateral.

• Bachelor’s Degree in Electrical Engineering or equivalent degree, and minimum 4 years of prior relevant experience (or Master’s Degree plus 2 years of prior relevant experience) developing, implementing, and verification of high‑performance communications/networking ASIC/FPGA products.
• Possess an active SECRET Clearance.
• Experience mapping algorithms and standards (Ethernet, TCP/IP, AXI) to hardware and architecture/system design tradeoffs.
• Proficient in VHDL design process and FPGA flow.
• Knowledge of Ethernet, TCP/IP protocols.
• Strong logic/board debug, and analytical skills.
• Excellent written, verbal, and presentation skills.

• Prior experience in Aerospace / Defense.
• Experience in C++ (OOP).
• Experience in Xilinx MPSOC design with writing/debugging with SDKs, BSPs on bare metal/Peta Linux OS.
• Experience with High level synthesis (Xilinx Vivado HLS, AND/OR Mentor Calypto).
• Experience with Universal Verification Mythology (UVM).
• Experience with project leadership and EVM.

In compliance with pay transparency requirements, the salary range for this role is $90,500 - $168,500. This is not a guarantee of compensation or salary, as final offer amount may vary based on factors including but not limited to experience and geographic location. L3

Harris also offers a variety of benefits, including health and disability insurance, 401(k) match, flexible spending accounts, EAP, education assistance, parental leave, paid time off, and company‑paid holidays. The specific programs and options available to an employee may vary depending on date of hire, schedule type, and the applicability of collective bargaining agreements.

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