Senior FPGA Design Engineer

Description

Are you a Senior FPGA Design Engineer who is looking to join one of the top companies within the Aerospace and Defense industry
?

Are you looking to further your career and grow?

Do you have experience designing FPGA products with VHDL?

If you answered yes to those three questions, then apply today!

Acara Solutions is seeking highly qualified candidates to work onsite with our client in Herndon, VA
. Interested?

• Reporting to the Manager, Engineering (ASIC/FPGA), the Senior Member of Engineering Staff (SMES) will be part of the key design team, responsible for the delivery of FPGAs for defense applications.
• S/he will architect, implement FPGA design, with hands‑on design/debug with primarily Ethernet, I2C, SPI, AXI protocols.
• Derive FPGA design specifications from system requirements.
• Develop a detailed FPGA architecture for implementation.
• Implement design in RTL (VHDL) and perform module‑level simulations.
• Perform Synthesis, Place and Route (PAR), and Static Timing Analysis (STA).
• Perform RTL quality using:
  Lint, Reset Domain Crossing (RDC), Clock Domain Crossing (CDC), Static Formal EDA.
• Generate verification test plans and perform End‑to‑end simulations.
• Support Board, FPGA bring‑up.
• Validate design through HW/SW integration test with test equipment.
• Support product collateral for NSA certification.
• This is a high‑impact role in the organization to ensure robust quality and delivery of communication products for National Security.

• Pay rate: $90.00–$115.00/Hour
• Hours:
  
  9/80
• Length:
  Contract to Direct (12 Months)

APPLY TODAY

Acara is a premier provider of recruiting and workforce solutions, and we help companies compete for talent. With a legacy of needs in various industries worldwide, we partner with clients, listen to them, and customise visionary talent solutions that drive desired business outcomes. We leverage decades of experience to deliver contingent staffing, direct placement, executive search, and workforce services worldwide.

• Bachelor’s Degree in Engineering or Engineering Technology or Chemistry or Physics or Mathematics or Data Science or Electrical or Electronics or Computer Engineering or Computer Science
• Minimum of 3 years of experience designing FPGA products with VHDL
• Minimum of 3 years of experience with Xilinx FPGAs and Vivado
• Minimum of 3 years of experience with a Revision control system
• Minimum of 3 years of experience with Earned Value Management (EVM)
• Minimum of 3 years of experience in FPGA design is going through the design and verification process
• Minimum of 3 years of Ethernet framing and protocol experience in FPGA

• Master’s Degree
• PhD
• Experience with mapping algorithms to architecture
• Experience in C++ (OOP)
• Experience with any of the protocols:
  Ethernet, TCP/IP, PCIe, NVMe, USB
• Experience with Xilinx SoC design with SDKs and Peta Linux OS
• Experience with High‑Level Synthesis (HLS) with Vivado HLX or Mentor Catapult 3
• Good written, verbal, and presentation skills

• Upon offer of employment, the individual will be subject to a background check and a drug screen.
• In compliance with federal law, all persons hired will be required to verify identity and eligibility to work in the United States and to complete the required employment eligibility verification form upon hire.
• Active Secret DoD Clearance

Aleron companies (Acara Solutions, Aleron Shared Resources, Broadleaf Results, Lume Strategies, Talent Rise, Viaduct) are an Equal Opportunity Employer. Race/Color/Gender/Religion/National Origin/Disability/Veteran.

Applicants for this position must be legally authorized to work in the United States. This position does not meet the employment requirements for individuals with F‑1 OPT STEM work authorization status.