Pathfinding Engineer
Listed on 2025-12-17
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Engineering
Electrical Engineering, Systems Engineer, Electronics Engineer
Join Intel's Mission to Transform Tomorrow:
The Silicon and Platform Engineering (SPE) team stands at the forefront of Intel's semiconductor innovation, driving the development and optimization of cutting‑edge silicon technologies that power the world's most advanced computing solutions. As a critical bridge between design and manufacturing, SPE ensures Intel's processors meet the highest standards of performance, reliability, and quality. Our team of world‑class engineers tackles the most complex challenges in silicon validation, leveraging state‑of‑the‑art debug methodologies and pioneering new techniques that define industry standards.
Within SPE, the Pathfinding Engineer plays a pivotal role in advancing our post‑silicon analysis capabilities, developing breakthrough tools and methodologies that enable rapid debug, failure analysis, and fault isolation (Debug/FA/FI). This position offers the unique opportunity to work at the intersection of hardware engineering and technology innovation, directly contributing to the silicon solutions that will shape the future of computing, artificial intelligence, and digital transformation across industries worldwide.
We're seeking a skilled Pathfinding Engineer to lead post‑silicon debug initiatives and advance optical tools development. This role combines hands‑on technical expertise with strategic innovation to solve complex semiconductor challenges.
Key Responsibilities Technical Execution- Develop and implement cutting‑edge debug methodologies.
- Debug failing units using functional testers and advanced fault isolation techniques (Ebeam, LIT, XADA, TADA, LVP, IREM, TIVA, FIB, Circuit Edit, etc.).
- Apply deep product architecture knowledge to identify failures efficiently and accurately.
- Partner closely with FIB, test, and design engineering teams to analyze and resolve complex issues.
- Translate technical findings into clear, actionable insights for stakeholders.
- Ensure customer requirements are understood and delivered on schedule.
- Define current and future debug lab requirements for Intel.
- Lead development projects that advance post‑silicon debug capabilities.
- Prepare for paradigm shifts in process technology roadmaps to ensure successful product launches.
- Create new test patterns, software solutions, and proof‑of‑concept demonstrations.
- Provide cross‑functional technical leadership and knowledge sharing.
- Exceptional problem‑solving abilities and analytical thinking.
- Self‑motivated professional who thrives with minimal supervision.
- Strong passion for semiconductor design and deep technical curiosity.
- Excellent communication and collaboration skills.
- Eagerness to learn and adapt to emerging technologies.
While comprehensive training on tools, techniques, and product architecture will be provided, you'll be expected to continuously expand your expertise through collaboration with Intel's global engineering teams. Ready to shape the future of technology? Let's create something extraordinary together.
QualificationsMinimum Qualifications
- US Citizenship Required.
- Bachelor of Science degree in electrical/electronic engineering, computer engineering/science, or any STEM related field of study.
- 2+ years of hands‑on experience in any of the following:
- Computer architecture (x86), VLSI circuit design, or device physics or process engineering.
- Working knowledge of Computer systems (i.e., Windows, Linux, and Unix).
- Experience with one of the following program languages (Python, Java, or C++).
- 4+ years of hands‑on experience in any of the following:
- Post silicon debug methodology.
- Technology Pathfinding experience.
- Experience with product improvements to enhance performance, yield, quality, or reliability.
- Experience with next‑generation Si, Product, and Package technologies.
- Experience with failure analysis, fault isolation, or debug tool sets.
- Post‑graduate degree in Electrical/Computer Engineering or any STEM related degree.
- Experience influencing the IP/SoC design decisions and/or pre‑/post‑ validation methods by doing validation gap analysis.
- Strong…
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