SoC Design Verification Engineer

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DDG designs next generation client microprocessors. Our team delivers emulation models to enable pre‑silicon verification.

Your responsibilities will include but not be limited to:

• Adding support for new features/IPs into existing emulation models
• Learning architecture and microarchitecture by debugging failures to the root cause
• Developing high level (for example, C++/Python) modeling for RTL components
• Developing and utilizing various debug and validation tools and/or methodologies to implement validation plans with the goal being to ensure a solid design
• Building multiple emulation targets for an SoC
• Participating in the debug of failures on silicon and developing new testing strategies to detect these failures on RTL models
• System level validation tasks such as using evaluation boards and FPGAs
• Soc level feature enabling/debug

The ideal candidate should exhibit the following behavioral traits:
Problem‑solving skills, Ability to multitask, Strong written and verbal communication skills, Ability to work in a dynamic and team‑oriented environment.

You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

• The candidate must have a Bachelor’s Degree in Computer Science, Computer Engineering or Electrical Engineering with 3+ years of relevant experience
  -OR
  - Master’s Degree in Computer Science, Computer Engineering or Electrical Engineering with 2+ years of relevant experience

• Experience with reading and interpreting technical specs and Register Transfer Level (RTL) code
• Experience with validation or testing experience, especially in a silicon design team
• Experience with UNIX or Linux
• Experience with IA‑32 assembly and/or Verilog programming experience
• Experience writing BFMs

• We offer a total compensation package that ranks among the best in the industry, consisting of competitive pay, stock, bonuses, as well as benefit programs which include health, retirement, and vacation.
• Annual Salary Range for jobs which could be performed in the US: $ - $ USD.
• Work Model for this Role:
  This role will require an on‑site presence.
• Job Type: Experienced Hire
• Shift: Shift 1 (United States of America)
• Primary
  
  Location:
  
  US, Oregon, Hillsboro
• Additional Locations: (not listed)
• Business group:
  The Silicon Engineering Group (SIG) is a worldwide organization focused on development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel’s leadership products.

Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A

Intel