Hybrid Logic Design Engineer - Memory Controller IP

Rambus in Hillsboro, OR is seeking a Logic Design Engineer to join our Memory Controller team. This full-time hybrid role lets you work onsite most days with some remote options, reporting to the Director of Engineering.

You will design and verify RTL IP, work with Verilog/System Verilog, and collaborate with a skilled team to deliver high-performance silicon. Qualifications include a bachelor’s degree in engineering, experience in RTL design and verification, and strong communication skills.

The following opportunity is for a Hybrid Logic Design Engineer
- Memory Controller IP with

We invite applications for the Hybrid Logic Design Engineer
- Memory Controller IP position located in Hillsboro, OR, United States.

The following role is for a Hybrid Logic Design Engineer
- Memory Controller IP with

Our team is growing, and we are hiring a Hybrid Logic Design Engineer
- Memory Controller IP in Hillsboro, OR, United States.