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Pre-Silicon Verification Engineer

Job in Hillsboro, Washington County, Oregon, 97124, USA
Listing for: Intel
Full Time position
Listed on 2026-10-12
Job specializations:
  • Engineering
    Test Engineer, Systems Engineer, Hardware Engineer, Electronics Engineer
Job Description & How to Apply Below
Job Details:

Job Description:

About Intel's Central Engineering Group Intel's Central Engineering Group (CEG) focuses on enhancing engineering execution and expanding market opportunities through internal product development and external ASIC design services. Guided by a data-driven approach, CEG drives scalable, impactful solutions across Intel's engineering processes while maintaining a commitment to delivering high-quality results.

Join a team dedicated to revolutionizing engineering methodologies and supporting Intel's industry leadership.

Position Overview As an IP Design Verification Engineer, you will play a crucial role in ensuring the functional accuracy and reliability of clock generator IPs, such as PLL and FLL, within Intel's innovative product development lifecycle. You will actively develop verification environments, implement tests, and debug pre-silicon issues to meet rigorous specification requirements.

Your contributions will directly impact the seamless integration of IPs into Intel's cutting-edge designs and ensure the highest standards of quality and performance.

Key Responsibilities Develop test benches, verification environments, and tests using System Verilog and UVM to ensure comprehensive IP validation

Perform functional verification for clock generator IPs such as PLL and FLL, ensuring conformance to microarchitecture specifications

Maintain and refine verification infrastructure and methodologies for multiple IP generations

Debug and root-cause pre-silicon issues within the verification environment

Document test plans and participate in technical reviews with design teams

Collaborate cross-functionally with architects, RTL developers, and analog design teams to enhance verification of architectural and microarchitectural features

Lead Mixed Signal Validation activities, including AMS simulations, schematic debugging, and resolving cross-functional issues

Contribute to the definition and refinement of architectural and microarchitectural features for IP design

What We're Looking For To be successful in this role, you should demonstrate the following professional traits:

A collaborative mindset with the ability to work effectively across cross-functional teams including architects, RTL developers, and analog design teams

Strong attention to detail when documenting test plans, debugging pre-silicon issues, and ensuring conformance to specification requirementsA proactive approach to problem-solving, with the ability to root-cause complex technical issues and drive them to resolution

Qualifications:

Minimum Qualifications Bachelor's Degree in Electrical or Computer Engineering or a related field, with 4+ years of relevant experience; ORMaster's Degree in Electrical or Computer Engineering or a related field, with 3+ years of relevant experience; ORPhD in Electrical or Computer Engineering or a related field, with 1+ years of relevant experience2+ years of experience in/with:

Design verification and validation methodologies, including UVM, System Verilog, and industry-standard EDA tools Scripting languages such as Python and Perl

Preferred Qualifications Expertise in System Verilog UVM coding and debugging

Familiarity with PLL/FLL or SOC clocking and related RTL development

Join Intel's Central Engineering Group today, where your skills will drive innovation, quality, and engineering excellence while advancing Intel's industry-leading technology solutions.

Job Type:Experienced Hire

Shift: Shift 1 (United States of America)
Primary

Location:

US, Oregon, Hillsboro Additional Locations:

US, Arizona, Phoenix, US, California, Folsom, US, California, Santa Clara, US, Massachusetts, Beaver Brook, US, Texas, Austin Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working ual Salary Range for jobs which could be performed in the US: $- USDThe range displayed on this job posting…
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