Quantum IC Substrate & 3D Packaging Design Engineer
Listed on 2026-10-15
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Engineering
Packaging Engineer, Electronics Engineer
Intel Corporation in Oregon is seeking a Quantum IC Substrate Package Layout Design Engineer to design large form factor IC substrates within a multidisciplinary team. You will deliver and validate IC substrate designs, collaborate across SI/PI/thermal teams, and coordinate tapeouts with substrate suppliers.
The role emphasizes fast-paced, innovative research in silicon quantum dot packaging. The position requires strong communication skills and a proven ability to work across diverse teams,
Step into the Quantum IC Substrate & 3D Packaging Design Engineer role at Intel Corporation in Hillsboro, OR, United States and grow with us.
This opportunity is part of our work in Engineering.
The advertised compensation is 122..
We aim to respond to suitable candidates as soon as possible.
Full responsibilities and requirements are described in the listing above.
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