Quantum IC Substrate Layout Engineer 5D/3D Packaging
Listed on 2026-10-15
-
Engineering
Packaging Engineer, Electrical Engineering, Electronics Engineer
Intel Corporation in Oregon invites an experienced Quantum IC Substrate Package Layout Design Engineer to join our Quantum Computing Group. You will design large form factor substrates, collaborate with SI/PI/thermal teams, and drive tapeouts with suppliers, delivering robust, manufacturable packaging solutions.
You will contribute to next-generation silicon quantum dot technology and stay at the forefront of semiconductor packaging innovations in a fast-paced research environment.
We are seeking a motivated Quantum IC Substrate Layout Engineer — 2.5D/3D Packaging to join Intel Corporation in Hillsboro, OR, United States.
The position is based in Hillsboro, OR, United States.
This opportunity is part of our work in Engineering.
The advertised compensation is 122..
We aim to respond to suitable candidates as soon as possible.
Full responsibilities and requirements are described in the listing above.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).