Quantum IC Substrate Layout Engineer; .5D/3D Packaging
Listed on 2026-10-15
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Engineering
Packaging Engineer, Electrical Engineering, Electronics Engineer, Systems Engineer
Intel Corporation's Quantum Computing Group in Hillsboro, Oregon seeks a Quantum IC Substrate Package Layout Design Engineer to design large form factor IC substrates within a multidisciplinary team, advancing silicon quantum dot technology.
You will use Siemens Xpedition, conduct DRC/LVS, support 2.5D/3D packaging, tapeouts with suppliers, and communicate designs to stakeholders while staying current with packaging trends.
This position is for the Quantum IC Substrate Layout Engineer (2.5D/3D Packaging) role at Intel Corporation.
We are currently recruiting a Quantum IC Substrate Layout Engineer (2.5D/3D Packaging) for our team in Hillsboro, OR, United States.
This is an excellent role to take on the Quantum IC Substrate Layout Engineer (2.5D/3D Packaging) role at Intel Corporation.
As a Quantum IC Substrate Layout Engineer (2.5D/3D Packaging), you will play an important part at Intel Corporation in Hillsboro, OR, United States.
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